| | | |
-60 | |
PARAMETER
|
2
|
DESCRIPTION
|
MIN |
MAX |
UNITS
|
Inputs |
tiobp |
20 |
I/O Register Bypass | |
2.7 |
ns |
tiolat |
21 |
I/O Latch Delay | |
4.0 |
ns |
tiosu |
22 |
I/O Register Setup Time before Clock |
7.3 | |
ns |
tioh |
23 |
1/0 Register Hold Time after Clock |
1.3 | |
ns |
tioco |
24 |
1/0 Register Clock to Out Delay | |
4.0 |
ns |
tior |
25 |
I/O Register Reset to Out Delay | |
3.3 |
ns |
tdin |
26 |
Dedicated Input Delay | |
5.3 |
ns |
GRP |
tgrpl |
27 |
GRP Delay, 1 GLB Load | |
2.0 |
ns |
tgrp4 |
28 |
GRP Delay, 4 GLB Loads | |
2.7 |
ns |
tgrp8 |
29 |
GRP Delay, 8 GLB Loads | |
4.0 |
ns |
tgrp12 |
30 |
GRP Delay, 12 GLB Loads | |
5.0 |
ns |
tgrp16 |
31 |
GRP Delay, 16 GLB Loads | |
6.0 |
ns |
tgrp24 |
32 |
GRP Delay, 24 GLB Loads | |
8.3 |
ns |
GLB |
t4ptbp |
33 |
4 Product Term Bypass Path Delay | |
8.6 |
ns |
tlptxor |
34 |
1 Product Term/XOR Path Delay | |
9.3 |
ns |
t20ptxor |
35 |
20 Product Term/XOR Path Delay | |
10.6 |
ns |
txoradj |
36 |
XOR Adjacent Path Delay3 | |
12.7 |
ns |
tgbp |
37 |
GLB Register Bypass Delay | |
1.3 |
ns |
tgsu |
38 |
GLB Register Setup Time before Clock |
1.3 | |
ns |
tgh |
39 |
GLB Register Hold Time after Clock |
6.0 | |
ns |
tgco |
40 |
GLB Register Clock to Output Delay | |
2.7 |
ns |
tgr |
41 |
GLB Register Reset to Output Delay | |
3.3 |
ns |
tptre |
42 |
GLB Product Term Reset to Register Delay | |
13.3 |
ns |
tptoe |
43 |
GLB Product Term Output Enable to l/0 Cell Delay | |
12.0 |
ns |
tptck |
44 |
GLB Product Term Clock Delay |
4.6 |
9.9 |
ns |
ORP |
torp |
45 |
ORP Delay | |
3.3 |
ns |
torpbp |
46 |
ORP Bypass Delay | |
0.7 |
ns |
| | | | | |
