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*1 : The timing reference point for the differential clocking is the cross point of CK and CK.
For any applications using the single ended clocking, apply VREF to CK pin.
ACF451832-151-TD01   datasheet 

VOUT: This is the regulated output voltage from the mod-
ule with respect to the common GND.

GND: The common node to which the input, output, and
external control signals are referenced.

Inhibit*: This is an open-collector (open-drain) negative
logic input that is referenced to GND. Pulling this pin
low disables the module's output voltage. If lnbibit* is
left open-circuit, the output will be active whenever a
valid input source is applied.
ACF451832-151-TD01   price 


Pin


Symbol


unction


1,5,6,7,8

lN


The pin is the input to the P-channel MOSFET source. Bypass to ground
through a l.OpF capacitor.

2


OUT


The pin is the P-channel MOSFET drain connection. Bypass to ground
through a O.lpF capacitor.

3


ON/OFF


Enable input.

4

GND


Ground connection.


ACF451832-151-TD01   pdf 


Ti=250C

IB-200mAU__



IB=lOOmA



7




B=4



Om


J



j









b




j










J



B=z

lOmA


J


j


_




B=l

Um


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