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AD1020R  Top sales 

For the mounting process the SMD type package can be handled as a standard
surface mount component. The use of either solder or conductive epoxy is possible.
The solder thickness after reflow should be typical 50pm [2 mils] and the lateral
alignment between the package and the motherboard should be within 50pm [2
mils]. Caution should be taken to obtain a good and reliable contact over the whole
pad areas. Voids or other improper connections, in particular, between the ground
pads of motherboard and package will lead to a deterioration of the RF performance
and the heat dissipation. The latter effect can reduce drastically reliability and lifetime
of the product.
AD1020R   seller 


ELECTRICAL SPECNFNCATNONS


ITEM


SYMBOL


CONDITION


STANDARD VALUE


UNIT


MIN


TYP.


MAX


Input Voltage


VDD


L level


0.7VDD


VDD


V


VIO


H level


0.3VDD


V


Supply Current


IDD


VDD= 5V


1.5


3 0


mA


Recommended LC Driving


- 200C


16.5


18 0


19.5


V


Voltage for Normal Temp.


VDD-VO


250C


15.5


17 0


18.5


Version Module


600C


14.5


16 0


17.5


LED Forward Voltage


VF


250C


4.2


4.6


V


LED Forward Current


lF


250C


500


1000


mm


EL


IEL


Vel = 110VAC; 400Hz


5 0


mA


AD1020R   datasheet 


Parameter

Symbol

Min

Nom

Max

Units

Frequency Range

F

869

894

MHz

Supply (Drain) Voltage

VD

26.0

28.0

32.0

VDC

Bias (Gate) Voltage

VG

3.0

3.5

5.0

VDC

Bias (Gate) Current, Average

IG

2.0

mA

RF Source & Load Impedance

Q

50

Ohms

Load Impedance for Stable Operation (AlI Phases)

VSWR

101

Operating Baseplate Temperature

TOP

-20

+90

oC

Output Device Thermal Resistance, Channel to Baseplate

0jc

0.8

oC/w


AD1020R   price 

. USB basic operation and transaction

control

. Up t0 5 endpoints

. PCI interface for Target and Master (2

DMA) modes

. Page and Descriptor DMA Modes

. USB data access by PCI target or DMA

. 0.35u Std cell technology

* Vdd = 3.3V, Ta = 0~700C

* 144 pin LQFP package (20 mm2)
AD1020R   pdf 




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