ET9138,Top sales ET9138,ET9138 DATASHEET -ICSTOCK

		?j	3	6V
		?j	3
		-	j	>3
		-	j	>3		3V
	---- ----- ---- 2.625 \		jj
Modi Inpu	a=l( I Swim	gi_i5dOeO:mye2 I;:Y :		=1)	2.375	V
'oaI=SeeIF'gure'0 I					2.375	V

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Checking the End of the Programming Cycle and Breaking off the Programming Cycle

Addressing the chip by the input of CS/E during active reprogramming terminates the programming
cycle. If the chip is addressed by entering CS/A, this will be ignored. Only when the programming
cycle has terminated will the chip react on CS/A. With this procedure the end of the programming
cycle can be checked, see figure 3.
ET9138 datasheet

2. Let the average ON current of D01 to D08, D029 to D036, and D057 to D064 be Il, 12, and I3, respectively: the

relationship among the Il, 12, and I3 should be as follows.
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SYMBOL	PIN NAME TQFP PIN NO.	SYMBOL PIN NAME	TQFP PIN NO.
Ao - A16 ADV WE CLK CKE CSi CS2 CS2 BWx(x=a,b,c,d) OE ZZ	Add ress Inputs 32,33,34,35,36,37 44,45,46,47,48,49 50,81,82,99,100 Address Advance/Load 85 Read/Write Control Input 88 Clock 89 Clock Enable 87 Chip Select 98 Chip Select 97 Chip Select 92 Byte Write Inputs 93,94,95,96 Output Enable 86 Power Sleep Mode 64 Burst Mode Control 31	VDD Power Supply(+3.3V) Vss Ground N.C. No Connect DQao~a7 Data Inputs/Outputs DQbo~b7 DQco~c7 DQdo~d7 DQPa~Pd VDDQ Output Power Supply (2.5V or 3.3V) Vsso Output Ground	14,15,16,41,65,66,91 17,40,67,90 38,39,42,43,83,84 52,53,56,57,58,59,62,63 68,69,72,73,74,75,78,79 2,3,6,7,8,9,12,13 18,19,22,23,24,25,28,29 51,80,1,30 4,11,20,27,54,61,70,77 5,10,21,26,55,60,71,76

ET9138 pdf

FEATURES IN COMMON WITH XA-G3
, Pin-compatibility (CAN RxD and CAN TxD use the XA-G3 NC
pins).
* 32K bytes of on-chip EPROM PROGRAM memory (see Table l)

, 44-pin PLCC (Figure l and Table 2) and 44-pin LQFP (Figure 2
and Table 3) packages.

, Commercial (0 t0 700C) and Industrial (-40 t0 850C) ranges.
* Supports off-chip addressing of PROGRAM and DATA memory
up t0 1 megabyte each (20 address lines).
, Three standard counter/timers (TO, T1, and T2) with
enhancements such as Auto Reload for PWM outputs.
* UART-O with enhancements such as separate Rx and Tx
interrupts, Break Detection, and Automatic Address Recognition.
, Watchdog with a secure WFEEDl /WFEED2 sequence.
* Four 8-bit l/0 ports with 4 programmable output configurations
per pin.