HD151TS301,Top sales HD151TS301,HD151TS301 DATASHEET -ICSTOCK

Parameter	Output	Description	Test Conditions	Min	Typ.	Max	Unit
tl	All	Output Duty Cycle["]	tl=tlAtlB	45	50	55	%
t2	CPUCLK	CPU Clock Rising and Falling Edge Rate	Between 0.4V and 2.OV, VDDCPU = 2.5V Between 0.4V and 2.4V, VDDCPU = 3.3V	0.75		4.0	V/ns
t2	AGP, REFO	AGP, REFO Clock Rising and Falling Edge Rate	Between 0.4V and 2.4V	0.85		4.0	V/ns
t2	PCI	PCI Rising and Falling Edge Rate	Between 0.4V and 2.4V	0.85		4.0	V/ns
t3	CPUCLK	CPU Clock Rise Time	Between 0.4V and 2.OV, VDDCPU = 2.5V Between 0.4V and 2.4V, VDDCPU = 3.3V	0.4 0.5		2.13 2.67	ns
t4	CPUCLK	CPU Clock Fall Time	Between 2.OV and 0.4V VDDCPU = 2.5V Between 2.4V and 0.4V, VDDCPU = 3.3V	0.4 0.5		2.13 2.67	ns
t5	CPUCLK	CPU-CPU Clock Skew	Measured at l.25V, VDDCPU = 2.5V Measured at l.5V, VDDCPU = 3.3V		100	500	ps
t6	CPUCLK, PCICLK	CPU-PCI Clock Skew	Measured at l.25V for 2.5V clocks, and at l.5V for 3.3V clocks	2.5	3.5	5.5	ns
t8	PCICLK, PCICLK	PCI-PCI Clock Skew	Measured at l.5V			500	ps
t9	PCICLK, AGP	PCI-AGP Clock Skew	Measured at l.5V			1,200	ps
t10	CPUCLK	Cycle-Cycle Clock Jitter	Measured at l.25V for 2.5V clocks, and at l.5V for 3.3V clocks			500	ps
t10	PCICLK	Cycle-Cycle Clock Jitter	Measured at l.5V			750	ps
t10	AGP	Cycle-Cycle Clock Jitter	Measured at l.5V			800	ps
t11	CPUCLK, PCICLK, AGP	Power-up Time	CPU, PCI, AGP clock stabilization from power-up			3	ms

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Param eter	Sym bol	Limits	Unit
Power dissipation	D	1000	mW
Junction temperature	Tj	1 50
Storage tem perature	Ts tg	-55 to +150

HD151TS301 datasheet

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HD151TS301 price

- Complete Programmable Device Can Combine Glue
Logic and Structured Designs
- Four Dedicated Clock Input Pins
- Synchronous and Asynchronous Clocks
- Flexible Pin Placement
- Optimized Global Routing Pool Provides Global
Interconnectivity
HD151TS301 pdf

Application information - Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.