HEF4086BT,Top sales HEF4086BT,HEF4086BT DATASHEET -ICSTOCK

Type number	Voltage Code	VRRM ' maximum repetitive peak reverse voltage V	VRSM ' maximum non- repetitive peak rev. voltage V	IRRM rriax. @ Tj = 1750C mA
	10	100	200
45L(R)	20	200	300	35
150K(R)	30	300	400
150KS(R)	40	400	500
150KS(R)	60	600	720

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Order Number	Package Number	Package Description
1000307PC	N24E	24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
1000307QC	V28A	28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC M0-047, 0.450 Square
1000307QI	V28A	28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC M0-047, 0.450 Square Industrial Temperature Range (-40IC to +85IC)

HEF4086BT datasheet

UL 1577/ UL 508 (File No.E108430), Fl EN60950 (File No.F113698)
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The device operation is controlled by instructions from the host processor. The list of
instructions and their associated opcodes are contained in Tables l through 4. A valid
instruction starts with the falling edge of CS followed by the appropriate 8-bit opcode
and the desired buffer or main memory address location. While the CS pin is low, tog-
gling the SCK pin controls the loading of the opcode and the desired buffer or main
memory address location through the Sl (serial input) pin. All instructions, addresses
and data are transferred with the most significant bit (MSB) first.
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Input Voltage

T r t l'VT -- - - '--- -- " -v Xr ' P __.,
OutDut Voltaae